An input/output (I/O) interface circuit is provided in conjunction with each I/O pad of many semiconductor chips, for example, to drive an external circuit connected to the I/O pad or to buffer signals received from the external circuit. The I/O interface circuit can become damaged when one or more power supplies of the I/O interface circuit are not available, while the I/O pad is connected to a live signal. Reliability issues can also arise during power-up sequencing. For instance, the I/O interface circuit can become damaged during specific power supply sequences, such as powering up the chip before or after an external signal is applied to the I/O pad.
Existing solutions provide external fault protection switches that isolate the input signal from the I/O pad, which allows the input signals to be present before the power supplies of the I/O interface circuit are available. These solutions, while may work for their intended purposes, not only add to the cost and board complexity, but can adversely affect the performance of the I/O interface circuit. Further, the existing solutions require the use of high voltage (e.g., thick-oxide) devices.